Department of Electrical and Computer Engineering
The University of Texas at Austin

EE 360N
Fall, 2005
Y. N. Patt, Instructor
TAs: Aater Suleman, Linda Bigelow, Jose Joao, Veynu Narasiman
Course Outline
August 31, 2005
 

August 31: Intro to the course. Levels of Transformations. Basic architectural choices. Science of Tradeoffs.

September 5: Labor Day, no class

September 7: Intro to Instruction Set Architecture, with examples taken from many diverse ISAs. Detailed discussion of LC-3b, with Assembly language constructs.

September 12: Translation from Assembly Language to ISA

Problem set 1 due before class, September 14
(Emphasis: ISA, LC-3b, Assembly process)
September 14: Intro to Microarchitecture: Detailed discussion of an LC-3b implementation.
Programming Lab 1 is due, Sunday night Sep 18, 11:59pm.
(Write a program in LC-3b Assembly Language. Write an Assembler.
Assemble the program you have written)
September 19: LC-3b microarchitecture, continued.

September 21: Physical memory, unaligned access, interleaving, SRAM, DRAM.

Programming Lab 2 is due, Sunday night Sep 25, 11:59pm.
(Write a program in C that simulates at the instruction
cycle level the baseline LC-3b ISA. Test your simulator with
the output of the assembler for the application program
written in Programming Lab 1.)
September 26: Virtual memory, page tables, TLB, VAX model, IA32 model, contrast with segmentation.

September 28: Virtual memory, continued

Problem set 2 due before class, October 3
(Emphasis: Microarchitecture, Physical memory, Virtual memory)
October 3: Cache Memory

October 5: No class, work on PA3

Programming Lab 3 is due, Sunday night, October 9, 11:59pm.
(Finish the clock cycle level Simulator for the LC-3b)
October 10: Interrupts/Exceptions

October 12: I/O

Problem set 3 due before class, October 17
(Emphasis: Virtual Memory, Cache Memory)
October 17: Review or catch up.

October 19, Exam 1

October 24: Introduction to Performance Enhancement. Pipelining, Branch Prediction.

October 26: Performance Enhancement: Vector Processing

October 26: Last day for an undergraduate to Q drop
without petition.

Programming Lab 4 is due, Sunday night October 30, 11:59pm.
(Interrupts/Exceptions)
October 31: Performance Enhancement: Out-of-order execution

November 2: Integer Arithmetic

Problem set 4 due before class, November 7.
(Emphasis: I/E, I/O, Pipelining, Branch Prediction, Vector
Processing)
November 7: Floating Point, and the IEEE Standard

November 9: Alternative Models of Concurrency: SIMD, MIMD, VLIW, Data Flow, new wrinkles

Problem set 5 due before class, November 14
(Emphasis: OOO, integer and floating point arithmetic)
November 14: Review for exam, or catch up!

November 16, Exam 2

November 21: Intro to Multiprocessing, interconnection networks, Amdahl's Law, consistency models (basically everything except cache coherency)

Programming Lab 5 is due, Tuesday night November 22, 11:59pm.
(Virtual memory)
November 23, Day before Thanksgiving: Review

November 28: Cache Coherency

November 30: Measurement Methodology

Problem set 6 due before class, December 5
(Emphasis: OOO, concurrency, multiprocessing, cache coherency)
December 5: A case study: microarchitecture of state-of-the-art microprocessors

December 7, Last class, free for all!

Programming Lab 6 is due, Friday, December 9, 5:00pm
(Pipelining)
Final exam: December 16, 7 to 10pm.