Chang Joo Lee

I completed a PhD at the ECE Department in the University of Texas at Austin in 2010. My PhD advisor was Professor Yale N. Patt in the HPS Research Group. I am currently working at Intel as a computer architect. I am interested in all about high-performance microprocessors. I am especially excited about high-performance memory system designs.

Educational Background

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• PhD in Computer Engineering, University of Texas at Austin, December 2010.
• MSE in Computer Engineering, University of Texas at Austin, May 2004.
• BS in Electrical Engineering, Seoul National University, February 2001.

Publications

• Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, and Yale N. Patt,
"Prefetch-Aware Shared-Resource Management for Multi-Core Systems"
Proceedings of the 38th International Symposium on Computer Architecture (ISCA), San Jose, CA, USA, June 2011.


• Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, and Yale N. Patt,
"Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multi-Core Memory Systems"
Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Pittsburgh, PA, USA, March 2010. Best Paper Award (one of three) by Program Committee


• Chang Joo Lee, Veynu Narasiman, Onur Mutlu, and Yale N. Patt,
"Improving Memory Bank-Level Parallelism in the Presence of Prefetching"
Proceedings of the 42nd Annual International Symposium on Microarchitecture (MICRO), New York, NY, USA, December 2009.


• Eiman Ebrahimi, Onur Mutlu, Chang Joo Lee, and Yale N. Patt,
"Coordinated Control of Multiple Prefetchers in Multi-Core Systems"
Proceedings of the 42nd Annual International Symposium on Microarchitecture (MICRO), New York, NY, USA, December 2009.


• Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, and Robert Cohn,
"Virtual Program Counter (VPC) Prediction: Very Low Cost Indirect Branch Prediction using Conditional Branch Prediction Hardware"
IEEE Transactions on Computers (TC) , September 2009.


• Chang Joo Lee, Onur Mutlu, Veynu Narasiman, and Yale N. Patt,
"Prefetch-Aware DRAM Controllers"
Proceedings of the 41st Annual International Symposium on Microarchitecture (MICRO), Lake Commo, Italy, November 2008.


• Chang Joo Lee, Hyesoon Kim, Onur Mutlu, and Yale N. Patt,
"Performance-Aware Speculation Control using Wrong Path Usefulness Prediction"
Proceedings of the 14th Annual International Symposium on High-Performance Computer Architecture (HPCA), Salt Lake City, UT, USA, February 2008.


• Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, and Robert Cohn,
"VPC Prediction: Reducing the Cost of Indirect Branches via Hardware-Based Dynamic Devirtualization"
Proceedings of the 34th Annual International Symposium on Computer Architecture (ISCA), San Diego, CA, USA, June 2007.

Technical Reports

• Chang Joo Lee, Eiman Ebrahimi, Veynu Narasiman, Onur Mutlu, and Yale N. Patt,
"DRAM-Aware Last-Level Cache Replacement"
HPS Technical Report, TR-HPS-2010-007, December 2010.


• Veynu Narasiman, Chang Joo Lee, Michael Shebanow, Rustam Miftakhutdinov, Onur Mutlu, and Yale N. Patt,
"Improving GPU Performance via Large Warps and Two-Level Warp Scheduling"
HPS Technical Report, TR-HPS-2010-006, December 2010.


• Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, and Yale N. Patt,
"Prefetch-Aware Shared-Resource Management for Multi-Core Systems"
HPS Technical Report, TR-HPS-2010-005, December 2010.


• Chang Joo Lee, Veynu Narasiman, Eiman Ebrahimi, Onur Mutlu, and Yale N. Patt,
"DRAM-Aware Last-Level Cache Writeback: Reducing Write-Caused Interference in Memory Systems"
HPS Technical Report, TR-HPS-2010-002, April 2010.


• Chang Joo Lee, Onur Mutlu, Veynu Narasiman, and Yale N. Patt,
"Prefetch-Aware DRAM Controllers"
HPS Technical Report, TR-HPS-2008-002, September 2008.


• Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, and Robert Cohn,
"VPC Prediction: Reducing the Cost of Indirect Branches via Hardware-Based Dynamic Devirtualization"
HPS Technical Report, TR-HPS-2007-002, March 2007.


• Chang Joo Lee, Hyesoon Kim, Onur Mutlu, and Yale N. Patt,
"Performance-Aware Speculation Control using Wrong Path Usefulness Prediction"
HPS Technical Report, TR-HPS-2006-010, December 2006.

Work Experience

• Teaching Assistant, Introduction to Computing Systems (EE 306), The University of Texas at Austin, Austin, USA, 2009


• Summer Intern, Thomas J. Watson IBM Reserach Center, Yorktown Heights, NY, USA, 2007


• Teaching Assistant, Computer Architecture (EE 360N), The University of Texas at Austin, Austin, USA, 2007


• Summer Intern, Thomas J. Watson IBM Reserach Center, Yorktown Heights, NY, USA, 2006


• Teaching Assistant, Microarchitecture (EE 382N), The University of Texas at Austin, Austin, USA, 2006


• Summer Intern, Freescale Semiconductor, Austin, TX, USA, 2005


• Summer Intern, Freescale Semiconductor, Austin, TX, USA, 2004


• Technical Engineer, Curitel Communication Inc., Seoul, Korea, 2002

Awards

• Best Paper Award, ASPLOS, 2010


• IBM Scholarship, 2008


• IBM PhD Fellowhship, 2007


• Scholarship from Ministry of Information and Communication in Korea, 2002

Contact Information

Last updated: February 2011.